Chapter 2
Xeon Phi MIC
Xeon Phi MIC allows you to leverage x86 architecture (CPU with many cores) but allow for more compute throughput by dedicating much of the silicon to floating point ops. The MIC is cache coherent and it increases floating-point throughput. It also uses wide SIMD registers for more throughput. The MIC has fast GDDR5 memory integrated on the card. Later model, like the Knights Landing, features high-bandwidth on-package memory (MCDRAM) to reduce bottlenecks.The MIC uses numerous low-power cores (60+) to deliver high parallel performance. Unlike GPUs, it supports standard x86 instruction sets, allowing the use of familiar languages like C++ and Fortran along with programming models such as OpenMP, MPI, and Pthreads.
The MIC can operate in three modes: Coprocessor/Offload (offloading tasks from the host CPU), Native (running as a standalone node with its own Linux OS), and Symmetric (using host and card together).
